The present invention relates to a chip-support arrangement with a chip support for the manufacture of a chip casing, said chip support being provided on a support foil with conducting paths which are connected on the front side of the support foil facing a chip to contact-surface metallizations of the chip and which with their free ends form a connection-surface arrangement distributed in planar manner for the purpose of connection to an electronic component or a substrate. The invention further relates to a chip support for the manufacture of a chip casing having a support foil comprising conducting paths.
With a view to protection against undesirable mechanical and chemical influences and also with a view to removing and distributing dissipated heat, as a rule it is necessary to provide chips with a casing. This casing furthermore offers the advantage that, by virtue of a connection-conductor arrangement that is guided from the chip-connection surfaces to the outside, an improvement in the handling of the chip in the course of subsequent mounting is achieved, since by means of the connection-conductor arrangement that is guided to the outside an enlargement of the connection surfaces is created and by means of an outwardly spreading configuration of the connection-conductor arrangement larger interspaces between the connection surfaces that are accessible from outside are created. With the surface-mounted technology (SMT) that is widespread nowadays it is therefore customary to make use of a casing made of plastic, ceramic or metal in which the external connection-conductor arrangement or connection-surface arrangement is realised by means of a plurality of connection pins projecting outwards (pin-grid array, PGA). With such casings the chips are arranged on a chip support that is many times larger than the chip itself, in order to be able to form on the chip support the connection-conductor arrangement described above. This results in a design of the chip casing which is voluminous overall and which proves disadvantageous, particularly in connection with the multi-chip module technology that is finding increasing application.
This recognised disadvantage was, inter alia, one reason for developing a chip casing, which is characterised in that the chip support itself together with its connection-conductor arrangement has roughly the same size as the chip. This was achieved by creating a chip support comprising a support foil made of polyimide which is provided on one side with connection conductors which at their free ends protruding beyond the support foil are connected to the chip-connection surfaces and at their end regions arranged on the support foil are connected in each given case to a contact metallization arranged on the opposite side of the support foil. By virtue of an arrangement of the contact metallizations distributed in planar manner on the opposite side of the support foil facing away from the chip a contact-metallization arrangement known by the expression "ball-grid array" is created which replaces the conventional connection conductor-pin arrangement (PGR) that is directed outwards.
Although this "internal" connection-conductor arrangement located in the region of the surface of the chip results overall in a substantially more compact design of the chip casing, with the known chip casing it is necessary to provide an additional insulating interlayer between the conductors and the surface of the chip. This interlayer makes it necessary, inter alia, that, with a view to connecting the conductor arrangement to the chip-connection surfaces, the ends of the individual conductors have to be bent out of the plane of the support foil in order to come into contact with the chip-connection surfaces. This makes it impossible, with a view to manufacture of the known chip casing, to make use of one of the known connection processes such as, for example, the tape-automated bonding (TAB) process or the flip-chip process.
Hence the object underlying the present invention is to create a chip casing which, in comparison with the known chip casing, makes possible a simplified structure and the use of conventional connection technologies for manufacture of the chip casing.